//------------------------------------------------------------------------------
// The confidential and proprietary information contained in this file may
// only be used by a person authorised under and to the extent permitted
// by a subsisting licensing agreement from ARM Limited.
//
//            (C) COPYRIGHT 2008-2012 ARM Limited.
//                ALL RIGHTS RESERVED
//
// This entire notice must be reproduced on all copies of this file
// and copies of this file may only be made by a person if such person is
// permitted to do so under the terms of a subsisting license agreement
// from ARM Limited.
//------------------------------------------------------------------------------
// Version and Release Control Information:
//
// File Revision       : 127275
// File Date           :  2012-03-19 15:37:15 +0000 (Mon, 19 Mar 2012)
// Release Information : PL401-r0p1-00eac0
//------------------------------------------------------------------------------
// Purpose : HDL defines file for AMBA interface block
//           AUTOMATICALLY GENERATED, ONLY MODIFY MARKED SECTIONS
//------------------------------------------------------------------------------

// Reg Slice configuration defines
`define RS_REGD            0            // fully registered register slice
`define RS_FWD_REG         1            // registered on forward path only
`define RS_REV_REG         2            // registered on reverse path only
`define RS_STATIC_BYPASS   3            // register slice bypass

// slave_if_data_width  32
// slave_if_protocol    axi4

// master_if_data_width 32
// master_if_protocol   itb
// AMBA sizer defines
`define AWFIFO_BYPASS 0
`define AWFIFO_SIZE 3:1
`define AWFIFO_ADDR 5:4
`define AWFIFO_MASK 7:6
`define AWFIFO_WRAP_FITS 8


`define ARDATA_SIZE 2:0
`define ARDATA_BYPASS 3
`define ARDATA_ADDR 5:4
`define ARDATA_MASK 7:6
`define ARDATA_END 9:8
`define ARDATA_ID 13:10
`define ARDATA_TWO 17:14
`define ARDATA_WRAP_FITS 18


//------------------------------------------------------------------------------
// nic400_ib_perip0_gp_apb4_ib_a_fifo Pointer Encoding
//------------------------------------------------------------------------------
  
`define NIC400_IB_PERIP0_GP_APB4_IB_A_FIFO_0_0 2'd0
`define NIC400_IB_PERIP0_GP_APB4_IB_A_FIFO_0_1 2'd1
`define NIC400_IB_PERIP0_GP_APB4_IB_A_FIFO_1_0 2'd3
`define NIC400_IB_PERIP0_GP_APB4_IB_A_FIFO_1_1 2'd2
`define NIC400_IB_PERIP0_GP_APB4_IB_A_FIFO_x_x {2{1'bx}}



//------------------------------------------------------------------------------
// nic400_ib_perip0_gp_apb4_ib_d_fifo Pointer Encoding
//------------------------------------------------------------------------------
  
`define NIC400_IB_PERIP0_GP_APB4_IB_D_FIFO_0_0 2'd0
`define NIC400_IB_PERIP0_GP_APB4_IB_D_FIFO_0_1 2'd1
`define NIC400_IB_PERIP0_GP_APB4_IB_D_FIFO_1_0 2'd3
`define NIC400_IB_PERIP0_GP_APB4_IB_D_FIFO_1_1 2'd2
`define NIC400_IB_PERIP0_GP_APB4_IB_D_FIFO_x_x {2{1'bx}}



//------------------------------------------------------------------------------
// nic400_ib_perip0_gp_apb4_ib_w_fifo Pointer Encoding
//------------------------------------------------------------------------------
  
`define NIC400_IB_PERIP0_GP_APB4_IB_W_FIFO_0_0 2'd0
`define NIC400_IB_PERIP0_GP_APB4_IB_W_FIFO_0_1 2'd1
`define NIC400_IB_PERIP0_GP_APB4_IB_W_FIFO_1_0 2'd3
`define NIC400_IB_PERIP0_GP_APB4_IB_W_FIFO_1_1 2'd2
`define NIC400_IB_PERIP0_GP_APB4_IB_W_FIFO_x_x {2{1'bx}}




//------------------------------------------------------------------------------
// End of File
//------------------------------------------------------------------------------

